Search Results - Tze-Chiang Chen

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  1. 1
    Efficient and bright organic light-emitting diodes on single-layer graphene electrodes

    Efficient and bright organic light-emitting diodes on single-layer graphene electrodes by Li, Ning, Oida, Satoshi, Tulevski, George S., Han, Shu-Jen, Hannon, James B., Sadana, Devendra K., Chen, Tze-Chiang

    Published in Nature communications
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  2. 2
    Challenges for silicon technology scaling in the Nanoscale Era

    Challenges for silicon technology scaling in the Nanoscale Era by Tze-chiang Chen

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  3. 3
    Characterization of the ultrathin HfO2 and Hf-silicate films grown by atomic layer deposition

    Characterization of the ultrathin HfO2 and Hf-silicate films grown by atomic layer deposition by TZE CHIANG CHEN, PENG, Cheng-Yi, TSENG, Chih-Hung, LIAO, Ming-Han, CHEN, Mei-Hsin, WU, Chih-I, CHERN, Ming-Yau, TZENG, Pei-Jer, CHEE WEE LIU

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  4. 4
    Efficiency enhancement of a-Si:H single junction solar cells by a-Ge:H incorporation at the p + a-SiC:H/transparent conducting oxide interface

    Efficiency enhancement of a-Si:H single junction solar cells by a-Ge:H incorporation at the p + a-SiC:H/transparent conducting oxide interface by Kim, Jeehwan, Abou-Kandil, Ahmed I., Hong, Augustin J., Saad, Mohamed M., Sadana, Devendra K., Chen, Tze-Chiang

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  5. 5
    Nanoscale chemical templating of Si nanowires seeded with Al

    Nanoscale chemical templating of Si nanowires seeded with Al by Khayyat, Maha M, Wacaser, Brent A, Reuter, Mark C, Ross, Frances M, Sadana, Devendra K, Chen, Tze-Chiang

    Published in Nanotechnology
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  6. 6
    Device technology innovation for exascale computing

    Device technology innovation for exascale computing by Tze-chiang Chen

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  7. 7
    Mechanism of Threshold Voltage Shift (Δ V th ) Caused by Negative Bias Temperature Instability (NBTI) in Deep Submicron pMOSFETs

    Mechanism of Threshold Voltage Shift (Δ V th ) Caused by Negative Bias Temperature Instability (NBTI) in Deep Submicron pMOSFETs by Liu, Chuan-Hsi, Lee, Ming T., Lin, Chih-Yung, Chen, Jenkon, Loh, Y. T., Liou, Fu-Tai, Schruefer, Klaus, Katsetos, Anastasios A., Yang, Zhijian, Rovedo, Nivo, Hook, Terence B., Wann, Clement, Chen, Tze-Chiang

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  8. 8
    Challenges for silicon technology scaling in the nanoscale era

    Challenges for silicon technology scaling in the nanoscale era by Tze-chiang Chen

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  9. 9
    Characterization of the Ultrathin \hbox and Hf-Silicate Films Grown by Atomic Layer Deposition

    Characterization of the Ultrathin \hbox and Hf-Silicate Films Grown by Atomic Layer Deposition by Chen, Tze Chiang, Peng, Cheng-Yi, Tseng, Chih-Hung, Liao, Ming-Han, Chen, Mei-Hsin, Wu, Chih-I, Chern, Ming-Yau, Tzeng, Pei-Jer, Liu, Chee Wee

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  10. 10
    Overcoming research challenges for CMOS scaling: industry directions

    Overcoming research challenges for CMOS scaling: industry directions by Tze-Chiang Chen

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  11. 11
    On the temperature dependence of majority carrier transport in heavily arsenic-doped polycrystalline silicon thin films

    On the temperature dependence of majority carrier transport in heavily arsenic-doped polycrystalline silicon thin films by CRESSLER, J. D, WEI HWANG, TZE-CHIANG CHEN

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  12. 12
    A 23-ps/2.1-mW ECL gate with an AC-coupled active pull-down emitter-follower stage

    A 23-ps/2.1-mW ECL gate with an AC-coupled active pull-down emitter-follower stage by Kai-Yap Toh, Ching-Te Chuang, Tze-Chiang Chen, Warnock, J.D.

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  13. 13
    Innovation in solid state devices for exascale computing

    Innovation in solid state devices for exascale computing by Tze-chiang Chen

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  14. 14
    On the narrow-emitter effect of advanced shallow-profile bipolar transistors

    On the narrow-emitter effect of advanced shallow-profile bipolar transistors by Li, G.P., Chuang, C.T., Chen, T.-C., Ning, T.H.

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  15. 15
    Collector-base junction avalanche effects in advanced double-poly self-aligned bipolar transistors

    Collector-base junction avalanche effects in advanced double-poly self-aligned bipolar transistors by Lu, P.-F., Chen, T.-C.

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  16. 16
    Message

    Message by Chen, Tze-Chiang

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  17. 17
    Modeling of currents in a vertical p-n-p transistor with extremely shallow emitter

    Modeling of currents in a vertical p-n-p transistor with extremely shallow emitter by Lu, P.-F., Chen, T.-C., Saccomango, M.J.

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  18. 18
    Design considerations of high-performance narrow-emitter bipolar transistors

    Design considerations of high-performance narrow-emitter bipolar transistors by Tang, D.D., Tze-Chiang Chen, Ching-Te Chuang, Li, G.P., Stork, J.M.C., Ketchen, M.B., Hackbarth, E., Ning, T.H.

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  19. 19
    Sub-300-ps CBL circuits

    Sub-300-ps CBL circuits by Widemann, S.K., Chen, T.-C., Chuang, C.-T., Heuber, K., Wendel, D.F., Warnock, J., Li, G.P., Chin, K., Ning, T.H.

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  20. 20
    Message from the Vice President, Science and Technology, IBM Research Division

    Message from the Vice President, Science and Technology, IBM Research Division by Chen, Tze-Chiang (T-C)

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