Search Results - Ubhi, Jagpal Singh

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  1. 1
    Design and analysis of CNTFET based 10T SRAM for high performance at nanoscale

    Design and analysis of CNTFET based 10T SRAM for high performance at nanoscale by Kumar, Mukesh, Ubhi, Jagpal Singh

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  2. 2
    A low leakage TG‐CNTFET–based inexact full adder for low power image processing applications

    A low leakage TG‐CNTFET–based inexact full adder for low power image processing applications by Goyal, Candy, Ubhi, Jagpal Singh, Raj, Balwinder

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  3. 3
    A Reliable Leakage Reduction Technique for Approximate Full Adder with Reduced Ground Bounce Noise

    A Reliable Leakage Reduction Technique for Approximate Full Adder with Reduced Ground Bounce Noise by Goyal, Candy, Raj, Balwinder, Ubhi, Jagpal Singh

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  4. 4
    Neural Style Transfer for image within images and conditional GANs for destylization

    Neural Style Transfer for image within images and conditional GANs for destylization by Mallika, Ubhi, Jagpal Singh, Aggarwal, Ashwani Kumar

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  5. 5
    Neural style transfer for image steganography and destylization with supervised image to image translation

    Neural style transfer for image steganography and destylization with supervised image to image translation by Garg, Mallika, Ubhi, Jagpal Singh, Aggarwal, Ashwani Kumar

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  6. 6
    QoS Improvement using Enhanced Manhattan Mobility Model on Proposed Ant Colony Optimization Technique in MANETs

    QoS Improvement using Enhanced Manhattan Mobility Model on Proposed Ant Colony Optimization Technique in MANETs

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  7. 7
    Consequences of Body-Biasing Technique on SRAM Memory

    Consequences of Body-Biasing Technique on SRAM Memory by Kumar, Mukesh, Ubhi, Dr. J. S.

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  8. 8
    Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology

    Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology by Kumar, Mukesh, Ubhi, Jagpal Singh, Basra, Sanjeev, Chawla, Anuj, Jatana, H.S.

    Published in Microelectronics
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  9. 9
    Low Power 3-Bit Flash ADC Design with Leakage Power Reduction at 45 nm Technology

    Low Power 3-Bit Flash ADC Design with Leakage Power Reduction at 45 nm Technology by Ubhi, Jagpal Singh, Tomar, Akash, Kumar, Mukesh

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