Search Results - Veeramanchaneni, S.

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    A Modified Twin Precision Multiplier with 2D Bypassing Technique

    A Modified Twin Precision Multiplier with 2D Bypassing Technique by Ahmed, S. E., Abraham, S., Veeramanchaneni, S., Moorthy Muthukrishnan, N., Srinivas, M. B.

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    Reconfigurable adders for Binary/BCD addition/subtraction

    Reconfigurable adders for Binary/BCD addition/subtraction by Ahmed, S. E., Veeramanchaneni, S., Muthukrishnan, N. M., Srinivas, M. B.

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