Search Results - Whetsel, L.

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  1. 1
    Adapting scan architectures for low power operation

    Adapting scan architectures for low power operation by Whetsel, L.

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  2. 2
    An analysis of power reduction techniques in scan testing

    An analysis of power reduction techniques in scan testing by Saxena, J., Butler, K.M., Whetsel, L.

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  3. 3
    Overview of the IEEE P1500 standard

    Overview of the IEEE P1500 standard by DaSilva, F., Zorian, Y., Whetsel, L., Arabi, K., Kapur, R.

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  4. 4
    Adapting jtag for ac interconnect testing

    Adapting jtag for ac interconnect testing by Whetsel, L.

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  5. 5
    Inevitable use of TAP domains in SOCs

    Inevitable use of TAP domains in SOCs by Whetsel, L.

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  6. 6
    An IEEE 1149.1 based test access architecture for ICs with embedded cores

    An IEEE 1149.1 based test access architecture for ICs with embedded cores by Whetsel, L.

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  7. 7
    Core test connectivity, communication, and control

    Core test connectivity, communication, and control by Whetsel, L.

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  8. 8
    Position paper: boundary-scan: built to last?

    Position paper: boundary-scan: built to last? by Whetsel, L.

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  9. 9
    A High Speed Reduced Pin Count JTAG Interface

    A High Speed Reduced Pin Count JTAG Interface by Whetsel, L.

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  10. 10
    Proposal to simplify development of a mixed signal test standard

    Proposal to simplify development of a mixed signal test standard by Whetsel, L.

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  11. 11
    An approach to accelerate scan testing in IEEE 1149.1 architectures

    An approach to accelerate scan testing in IEEE 1149.1 architectures by Whetsel, L.

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  12. 12
    Navigating test access in systems

    Navigating test access in systems by Whetsel, L.

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  13. 13
    Improved boundary scan design

    Improved boundary scan design by Whetsel, L.

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  14. 14
    Addressable test ports an approach to testing embedded cores

    Addressable test ports an approach to testing embedded cores by Whetsel, L.

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  15. 15
    Adapting JTAG for AC interconnect testing

    Adapting JTAG for AC interconnect testing by Whetsel, L.

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  16. 16
    Test access of TAP'ed and non-TAP'ed cores

    Test access of TAP'ed and non-TAP'ed cores by Whetsel, L.

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  17. 17
    At-speed board test simplified via embeddable data trace/compaction IC

    At-speed board test simplified via embeddable data trace/compaction IC by Whetsel, L.

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  18. 18
    Towards a standard for embedded core test: an example

    Towards a standard for embedded core test: an example by Marinissen, E.J., Zorian, Y., Kapur, R., Taylor, T., Whetsel, L.

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  19. 19
    A Proposed Method of Accessing 1149.1 in a Backplane Environment

    A Proposed Method of Accessing 1149.1 in a Backplane Environment by Whetsel, L.

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  20. 20
    Evolution of IEEE 1149.1 addressable shadow protocol devices

    Evolution of IEEE 1149.1 addressable shadow protocol devices by Joshi, R.N., Williams, K.L., Whetsel, L.

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