Search Results - Widianto, M H

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  1. 1
    Development of online learning media based on Telegram Chatbot (Case studies: Programming courses)

    Development of online learning media based on Telegram Chatbot (Case studies: Programming courses) by Ardimansyah, M I, Widianto, M H

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  2. 2
    Natural Silica Sand/Alumina Ceramic Composites: Promising Candidates for Fuel-Cell Sealants

    Natural Silica Sand/Alumina Ceramic Composites: Promising Candidates for Fuel-Cell Sealants by Hidayat, N, Istiqomah, Widianto, M Y H, Taufiq, A, Sunaryono, Triwikantoro, Zainuri, M, Baqiya, M A, Aristia, G, Pratapa, S

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  3. 3
    A bibliometric analysis of tourism gentrification

    A bibliometric analysis of tourism gentrification by Widianto, HW, Ahdiyana, M, Pambudi, A, Agustanta, N

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  4. 4
    Build Testbenches for Verification in Shift Register ICs using SystemVerilog

    Build Testbenches for Verification in Shift Register ICs using SystemVerilog by Widianto, Chasrun, H M, Lis, Robert

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  5. 5
    Electronic Properties of Rare-Earth Doped α-GaN

    Electronic Properties of Rare-Earth Doped α-GaN by Widianto, Muhammad, Purqon, Acep

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  6. 6
    Matar: A forgotten but promising Pleistocene locality in East Java

    Matar: A forgotten but promising Pleistocene locality in East Java by Fauzi, M. Ruly, Ansyori, M.M., Prastiningtyas, D., Intan, M.F.S., Wibowo, U.P., Wulandari, Rahmanendra, H., Widianto, H., Simanjuntak, T.

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  7. 7
    Litter layer residence time in forest and coffee agroforestry systems in Sumberjaya, West Lampung

    Litter layer residence time in forest and coffee agroforestry systems in Sumberjaya, West Lampung by Hairiah, Kurniatun, Sulistyani, Hermi, Suprayogo, Didik, Widianto, Purnomosidhi, Pratiknyo, Widodo, Rudy Harto, Van Noordwijk, Meine

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  8. 8
    A built-in electrical test circuit for interconnect tests in assembled PCBs

    A built-in electrical test circuit for interconnect tests in assembled PCBs by Widianto, W., Yotsuyanagi, H., Ono, A., Takagi, M., Roth, Z., Hashizume, M.

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  9. 9
    A built-in test circuit for open defects at interconnects between dies in 3D ICs

    A built-in test circuit for open defects at interconnects between dies in 3D ICs by Widianto, Yotsuyanagi, H., Ono, A., Takagi, M., Hashizume, M.

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