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Search Results - Yoo, Jeihwan
Search Results - Yoo, Jeihwan
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A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth
by
Youngdon Choi
,
Ickhyun Song
,
Mu-Hui Park
,
Hoeju Chung
,
Sanghoan Chang
,
Beakhyoung Cho
,
Jinyoung Kim
,
Younghoon Oh
,
Duckmin Kwon
,
Jung Sunwoo
,
Junho Shin
,
Yoohwan Rho
,
Changsoo Lee
,
Min Gu Kang
,
Jaeyun Lee
,
Yongjin Kwon
,
Soehee Kim
,
Jaehwan Kim
,
Yong-Jun Lee
,
Qi Wang
,
Sooho Cha
,
Sujin Ahn
,
Horii, Hideki
,
Jaewook Lee
,
Kisung Kim
,
Hansung Joo
,
Kwangjin Lee
,
Yeong-Taek Lee
,
Jeihwan Yoo
,
Jeong, G.
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A 31 ns Random Cycle VCAT-Based 4F ^ DRAM With Manufacturability and Enhanced Cell Efficiency
by
Song, Ki-Whan
,
Kim, Jin-Young
,
Yoon, Jae-Man
,
Kim, Sua
,
Kim, Huijung
,
Chung, Hyun-Woo
,
Kim, Hyungi
,
Kim, Kanguk
,
Park, Hwan-Wook
,
Kang, Hyun Chul
,
Tak, Nam-Kyun
,
Park, Dukha
,
Kim, Woo-Seop
,
Lee, Yeong-Taek
,
Oh, Yong Chul
,
Jin, Gyo-Young
,
Yoo, Jeihwan
,
Park, Donggun
,
Oh, Kyungseok
,
Kim, Changhyun
,
Jun, Young-Hyun
Published in
IEEE journal of solid-state circuits
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BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel
by
JANG, Young-Chan
,
CHUNG, Hoeju
,
LEE, Yun-Sang
,
KIM, Woo-Seop
,
LEE, Jung-Bae
,
YOO, Jeihwan
,
KIM, Changhyun
,
CHOI, Youngdon
,
PARK, Hwanwook
,
KIM, Jaekwan
,
LIM, Soouk
,
SUNWOO, Jung
,
PARK, Moon-Sook
,
KIM, Hyung-Seuk
,
KIM, Sang-Yun
Published in
IEEE journal of solid-state circuits
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A 31 ns Random Cycle VCAT-Based 4F 2 DRAM With Manufacturability and Enhanced Cell Efficiency
by
Song, Ki-Whan
,
Kim, Jin-Young
,
Yoon, Jae-Man
,
Kim, Sua
,
Kim, Huijung
,
Chung, Hyun-Woo
,
Kim, Hyungi
,
Kim, Kanguk
,
Park, Hwan-Wook
,
Kang, Hyun Chul
,
Tak, Nam-Kyun
,
Park, Dukha
,
Kim, Woo-Seop
,
Lee, Yeong-Taek
,
Oh, Yong Chul
,
Jin, Gyo-Young
,
Yoo, Jeihwan
,
Park, Donggun
,
Oh, Kyungseok
,
Kim, Changhyun
,
Jun, Young-Hyun
Published in
IEEE journal of solid-state circuits
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Article
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A 31 ns Random Cycle VCAT-Based 4F2 DRAM With Manufacturability and Enhanced Cell Efficiency
by
SONG, Ki-Whan
,
KIM, Jin-Young
,
TAK, Nam-Kyun
,
PARK, Dukha
,
KIM, Woo-Seop
,
LEE, Yeong-Taek
,
YONG CHUL OH
,
JIN, Gyo-Young
,
YOO, Jeihwan
,
PARK, Donggun
,
OH, Kyungseok
,
KIM, Changhyun
,
YOON, Jae-Man
,
JUN, Young-Hyun
,
KIM, Sua
,
KIM, Huijung
,
CHUNG, Hyun-Woo
,
KIM, Hyungi
,
KIM, Kanguk
,
PARK, Hwan-Wook
,
HYUN CHUL KANG
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Self-calibrating transceiver for source synchronous clocking system with on-chip TDR and swing level control scheme
by
Jang, Young-Chan
,
Park, Joon-Young
,
Shin, Sungcheol
,
Choi, Hundae
,
Lee, Kyongsu
,
Woo, Byungsuk
,
Park, Hwanwook
,
Kim, Woo-Seop
,
Choi, Youngdon
,
Kim, Jaekwan
,
Kim, Hyun-Kyung
,
Kim, Jayoung
,
Lim, Suyoun
,
Chung, Su-Jin
,
Kim, Sora
,
Yoo, Jeihwan
,
Kim, Changhyun
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A 31ns random cycle VCAT-based 4F2 DRAM with enhanced cell efficiency
by
Song, Ki-Whan
,
Kim, Jin-Young
,
Kim, Huijung
,
Chung, Hyun-Woo
,
Kim, Hyungi
,
Kim, Kanguk
,
Park, Hwan-Wook
,
Kang, Hyun Chul
,
Kim, Sua
,
Tak, Nam-kyun
,
Park, Dukha
,
Kim, Woo-Seop
,
Lee, Yeong-Taek
,
Oh, Yong Chul
,
Jin, Gyo-Young
,
Yoo, Jeihwan
,
Oh, Kyungseok
,
Kim, Changhyun
,
Lee, Won-Seong
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