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    Investigation on Artificial Intelligence Hardware Architecture Design Based on Logic‐in‐Memory Ferroelectric Fin Field‐Effect Transistor at Sub‐3nm Technology Nodes

    Investigation on Artificial Intelligence Hardware Architecture Design Based on Logic‐in‐Memory Ferroelectric Fin Field‐Effect Transistor at Sub‐3nm Technology Nodes by Ra, Changho, Kim, Huijun, Park, Juhwan, Youn, Gwanoh, Lee, Uyong, Heo, Junsu, Park, Chester Sungchung, Jeon, Jongwook

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