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Search Results - Zapletina, Mariya A.
Search Results - Zapletina, Mariya A.
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The Analysis of Logic Resynthesis Methods to Increase the Fault Tolerance of Combinational Circuits for Single Failures
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Vasilyev, Nikolay O.
,
Zapletina, Mariya A.
,
Ivanova, Galina A.
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The Iterative SAT Based Approach to Detailed Routing for Reconfigurable System-on-a-Chip
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Zhukov, Denis V.
,
Zheleznikov, Daniil A.
,
Zapletina, Mariya A.
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The Global Interconnect Routing Approach for Reconfigurable System-on-a-Chip
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Zapletina, Mariya A.
,
Zheleznikov, Daniil A.
,
Gavrilov, Sergey V.
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The Acceleration Techniques for the Modified Pathfinder Routing Algorithm on an Island-Style FPGA
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Zapletina, Mariya A.
,
Zheleznikov, Daniil A.
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The Review of Cellular Automata Algorithms for Placement and Routing Problems
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Zapletina, Mariya A.
,
Zhukov, Denis V.
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Improving Pathfinder Algorithm Perfomance for FPGA Routing
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Zapletina, Mariya A.
,
Zheleznikov, Daniil A.
,
Gavrilov, Sergey V.
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The Rip-up and Reroute Technique Research for Island-Style Reconfigurable System-on-Chip
by
Zapletina, Mariya A.
,
Zheleznikov, Daniil A.
,
Khvatov, Vasilii M.
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Electronic Engineering
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Routing
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Engineering, Electrical & Electronic
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Field Programmable Gate Arrays
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Ieee Electronic Library (Iel) Conference Proceedings
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Ieee Xplore All Conference Series
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Ieee Electronic Library (Iel) Standards
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