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Search Results - de Lange, A.A.J.
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Hierarchical parameterized synthesis of semi regular VLSI processor arrays
by
de Lange, A.A.J.
,
Deprettere, E.F.
,
Dewilde, P.M.
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Real time application of the floating point pipeline CORDIC processor in massive-parallel pipelined DSP algorithms
by
de Lange, A.A.J.
,
Deprettere, E.F.
,
van der Veen, A.
,
Bu, J.
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A model for the high-level description and simulation of VLSI networks
by
van der Hoeven, A.J.
,
de Lange, A.A.J.
,
Deprettere, E.F.
,
Dewilde, P.M.
Published in
IEEE MICRO
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Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing
by
de Lange, A.A.J.
,
Deprettere, E.F.
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An efficient multi-window display-memory architecture for full-motion video signals
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de Lange, A.A.J.
,
La Hei, G.D.
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A new model for the high level description and simulation of VLSI networks
by
van der Hoeven, A. J.
,
de Lange, A. A.
,
Deprettere, E. F.
,
Dewilde, P. M.
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A hierarchical constraint graph generation and compaction system for symbolic layout
by
de Lange, A.A.J.
,
de Lange, J.S.J.
,
Vink, J.F.
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An application specific IC for digital signal processing: the floating point pipeline CORDIC processor
by
de Lange, A.A.J.
,
van der Hoeven, A.J.
,
Deprettere, E.F.
,
Dewilde, P.
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Shift of the DX level in narrow Si delta-doped GaAs
by
Koenraad, P M
,
Lange, W de
,
Blom, F A P
,
Leys, M R
,
Perenboom, J A A J
,
Singleton, J
,
Wolter, J H
Published in
Semiconductor science and technology
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