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Search Results - van der Klauw, C.L.M.
Search Results - van der Klauw, C.L.M.
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A full adder using junction charge-coupled logic
by
van der Klauw, C.L.M.
Published in
IEEE journal of solid-state circuits
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Vertical charge transport and charge-handling capability in junction charge-coupled devices
by
van der Klauw, C.L.M.
Published in
IEEE transactions on electron devices
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Self-multiplexing force-sense test structures for (MOS) IC applications
by
van der Klauw, C.L.M.
,
Joosten, J.J.M.
Published in
IEEE transactions on semiconductor manufacturing
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Analysis of the determination of the dimensional offset of conducting layers and MOS transistors
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Swaving, S.
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van der Klauw, C.L.M.
,
Joosten, J.J.M.
Published in
IEEE transactions on semiconductor manufacturing
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Junction charge-coupled logic (JCCL)
by
May, E.P.
,
van der Klauw, C.L.M.
,
Kleefstra, M.
,
Wolsheimer, E.E.
Published in
IEEE journal of solid-state circuits
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