A 26 \mu W 8 bit 10 MS/s Asynchronous SAR ADC for Low Energy Radios by Harpe, P. J. A., Zhou, C., Yu Bi, van der Meijs, N. P., Xiaoyan Wang, Philips, K., Dolmans, G., de Groot, H.

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Dynamic Thermal Estimation Methodology for High-Performance 3-D MPSoC by Zjajo, Amir, van der Meijs, Nick, van Leuken, Rene

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Considering Crosstalk Effects in Statistical Timing Analysis by Qin Tang, Zjajo, Amir, Berkelaarand, Michel, van der Meijs, Nick

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Statistical Transistor-Level Timing Analysis Using a Direct Random Differential Equation Solver by Qin Tang, Rodriguez, Javier, Zjajo, Amir, Berkelaar, Michel, van der Meijs, Nick

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Stochastic Analysis of Deep-Submicrometer CMOS Process for Reliable Circuits Designs by Zjajo, A, Qin Tang, Berkelaar, M, Pineda de Gyvez, Jose, Di Bucchianico, A, van der Meijs, N

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A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOS by Blutman, Kristof, Angevare, Jan, Zjajo, Amir, van der Meijs, Nick

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A 26 [Formula Omitted]W 8 bit 10 MS/s Asynchronous SAR ADC for Low Energy Radios by Harpe, Pieter J. A, Zhou, Cui, Bi, Yu, van der Meijs, Nick P, Wang, Xiaoyan, Philips, Kathleen, Dolmans, Guido, de Groot, Harmke

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Balanced stochastic truncation of coupled 3D interconnect by Zjajo, Amir, van der Meijs, Nick, van Leuken, Rene

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A 26 μW 8 bit 10 MS/s Asynchronous SAR ADC for Low Energy Radios: SPECIAL ISSUE ON THE 36th EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC) by HARPE, Pieter J. A, CUI ZHOU, YU BI, VAN DER MEIJS, Nick P, XIAOYAN WANG, PHILIPS, Kathleen, DOLMANS, Guido, DE GROOT, Harmke

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Transistor-level gate model based statistical timing analysis considering correlations by Tang, Qin, Zjajo, Amir, Berkelaar, Michel, van der Meijs, Nick

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Models for integrated components coupled with their EM environment by Ioan, Daniel, Schilders, Wil, Ciuprina, Gabriela, van der Meijs, Nick, Schoenmaker, Wim

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RDE-based transistor-level gate simulation for statistical static timing analysis by Qin Tang, Zjajo, Amir, Berkelaar, Michel, van der Meijs, Nick

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Statistical delay calculation with Multiple Input Simultaneous Switching by Qin Tang, Zjajo, A, Berkelaar, M, van der Meijs, N

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Enhanced sensitivity computation for BEM based capacitance extraction using the Schur complement technique by Yu Bi, de Graaf, S., van der Meijs, N.

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Balanced Truncation of a stable non-minimal deep-submicron CMOS interconnect by Zjajo, A, Tang, Q, Berkelaar, M, van der Meijs, N

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Noise analysis of non-linear dynamic integrated circuits by Zjajo, A, Qin Tang, Berkelaar, M, van der Meijs, N

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Fast statistical analysis of RC nets subject to manufacturing variabilities by Yu Bi, van der Kolk, Kees-Jan, Villena, Jorge Fernández, Silveira, Luís Miguel, van der Meijs, Nick

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Statistical power optimization of deep-submicron digital CMOS circuits based on structured perceptron by Zjajo, Amir, van der Meijs, Nick, van Leuken, Rene

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Simultaneous Analytic Area and Power Optimization for Repeater Insertion by Garcea, Giuseppe S, van der Meijs, Nick P, Otten, Ralph H J M

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Statistically aware buffer planning by Garcea, G.S., van der Meijs, N.P., van der Kolk, K.-J., Otten, R.H.J.M.

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