An Assembler Driven Verification Methodology (ADVM)

This paper presents an overview of an assembler driven verification methodology (ADVM) that was created and implemented for a chip card project at Infineon Technologies AG. The primary advantage of this methodology is that it enables rapid porting of directed tests to new targets and derivatives, wi...

Full description

Saved in:
Bibliographic Details
Main Authors: MacBeth, John S., Heinz, Dietmar, Gray, Ken
Format: Conference Proceeding
Language:English
Subjects:
Assembly
Automatic testing
Embedded software
Emulation
Hardware > Hardware test
Hardware > Hardware validation > Functional verification
Hardware > Robustness
Hardware design languages
Microprocessors
Programming
Silicon
Social and professional topics > Professional topics > Management of computing and information systems > Project and people management > Systems analysis and design
Software and its engineering > Software notations and tools > Context specific languages > Macro languages
Software and its engineering > Software notations and tools > General programming languages > Language types > Assembly languages
Software testing
System-on-a-chip
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This paper presents an overview of an assembler driven verification methodology (ADVM) that was created and implemented for a chip card project at Infineon Technologies AG. The primary advantage of this methodology is that it enables rapid porting of directed tests to new targets and derivatives, with only a minimum amount of code refactoring. As a consequence, considerable verification development time and effort was saved.
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2005.52