Guess, solder, measure, repeat: how do I get my mixed-signal chip right?

Over the past 20 years, EDA has developed a solid digital implementation methodology that combines some restrictions on the design style with a set of comprehensive tools leading to predictable design flows. The recent increased use of analog components in complex SOC designs triggered a set of veri...

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Bibliographic Details
Main Authors: Ying, Geoffrey, Kuehlmann, Andreas, Kundert, Ken, Gielen, George, Grimme, Eric, O'Leary, Martin, Tare, Sandeep, Wong, Warren
Format: Conference Proceeding
Language:English
Subjects:
Analog Behavioral Modeling
Analog circuits
Circuit simulation
Electronic design automation and methodology
Functional Verification
Hardware > Electronic design automation > Physical design (EDA)
Hardware design languages
Instruments
Integrated circuit modeling
Knowledge engineering
Low Power Verification
Mixed-signal Verification
Performance Verification
Permission
Semiconductor device measurement
SPICE
Verilog
Verilog-AMS
VHDL
Online Access:Request full text
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Summary:Over the past 20 years, EDA has developed a solid digital implementation methodology that combines some restrictions on the design style with a set of comprehensive tools leading to predictable design flows. The recent increased use of analog components in complex SOC designs triggered a set of verification challenges ranging from simple connectivity problems to complex interferences between analog and digital data blocks. This panel discusses the state of the affairs in analog-mixed signal verification and draws a picture of future directions in terms of new approaches and tools.
ISSN:0738-100X
DOI:10.1145/1629911.1630046