A novel CMOS charge-pump circuit with current mode control 110 mA at 2.7 V for telecommunication systems

This paper presents a novel organization of switch capacitor charge pump circuits based on voltage doubler structures. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading voltage doublers the output voltage increases up to 2 times. A two-phase voltage doubler and a m...

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Bibliographic Details
Published in:Journal of semiconductors 2010 (4), p.57-61
Main Author: Salahddine Krit Hassan Qjidaa Imad El Affar Yafrah Khadija Ziani Messghati Yassir EI-Ghzizal
Format: Article
Language:Chinese
Subjects:
CMOS技术
开关电容
电信系统
电流模式控制
电荷泵电路
电路级模拟
直流电压
组织结构
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Summary:This paper presents a novel organization of switch capacitor charge pump circuits based on voltage doubler structures. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading voltage doublers the output voltage increases up to 2 times. A two-phase voltage doubler and a multiphase voltage doubler structures are discussed and design considerations are presented. A simulator working in the Q-V realm was used for simplified circuit level simulation. In order to evaluate the power delivered by a charge pump, a resistive load is attached to the output of the charge pump and an equivalent capacitance is evaluated. To avoid the short circuit during switching, a clock pair generator is used to achieve multi-phase non-overlapping clock pairs. This paper also identifies optimum loading conditions for different configurations of the charge pumps. The proposed charge-pump circuit is designed and simulated by SPICE with TSMC 0.35-μm CMOS technology and operates with a 2.7 to 3.6 V supply voltag
ISSN:1674-4926