A new FPGA architecture suitable for DSP applicationst

A new FPGA architecture suitable for digital signal processing applications is presented. DSP modules can be inserted into FPGA conveniently with the proposed architecture, which is much faster when used in the field of digital signal processing compared with traditional FPGAs. An advanced 2-level M...

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Bibliographic Details
Published in:半导体学报 2011, Vol.32 (5), p.140-145
Main Author: 王丽云 来金梅 童家榕 唐璞山 陈星 段雪岩 陈利光 王健 王元
Format: Article
Language:Chinese
Subjects:
CMOS技术
DSP
FPGA
休眠模式
体系结构
数字信号处理
架构
芯片尺寸
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Summary:A new FPGA architecture suitable for digital signal processing applications is presented. DSP modules can be inserted into FPGA conveniently with the proposed architecture, which is much faster when used in the field of digital signal processing compared with traditional FPGAs. An advanced 2-level MUX （multiplexer） is also proposed. With the added SLEEP MODE PASS to traditional 2-level MUX, static leakage is reduced. Furthermore, buffers are inserted at early returns of long lines. With this kind of buffer, the delay of the long line is improved by 9.8% while the area increases by 4.37%. The layout of this architecture has been taped out in standard 0.13 μm CMOS technology successfully. The die size is 6.3 × 4.5 mm^2 with the QFP208 package. Test results show that performances of presented classical DSP cases are improved by 28.6%-302% compared with traditional FPGAs.
ISSN:1674-4926