Investigation on Artificial Intelligence Hardware Architecture Design Based on Logic‐in‐Memory Ferroelectric Fin Field‐Effect Transistor at Sub‐3nm Technology Nodes

• Published in: Advanced intelligent systems 2024-09
• Main Authors: Ra, Changho, Kim, Huijun, Park, Juhwan, Youn, Gwanoh, Lee, Uyong, Heo, Junsu, Park, Chester Sungchung, Jeon, Jongwook
• Format: Article
• Language: English
• ISSN: 2640-4567; 2640-4567
• DOI: 10.1002/aisy.202400370

With the advancement of artificial intelligence and internet of things, logic‐in‐memory (LiM) technology has garnered attention. This article presents research on LiM utilizing ferroelectric fin field‐effect transistor (FinFET). Herein, the LiM characteristics of FinFET with hafnia‐based switchable ferroelectric gate stack applied to the sub‐3 nm future technology node are analyzed. This analysis is extended to the system level and its characteristics are observed. A compact model of the ferroelectric capacitor using Verilog‐A is developed and the operation of LiM circuits such as 1‐bit full adder, ternary content‐addressable memory, and flip‐flop by combining FinFET characteristics based on atomistic simulation with fabricated silicon‐doped hafnium oxide characteristics is analyzed. Furthermore, by applying these ferroelectric devices, a power consumption reduction of 85.2% in the convolutional neural network accelerator at the system level is observed.