Programming many-core architectures - a case study: dense matrix computations on the Intel single-chip cloud computer processor

SUMMARY A message passing, distributed‐memory parallel computer on a chip is one possible design for future, many‐core architectures. We discuss initial experiences with the Intel Single‐chip Cloud Computer research processor, which is a prototype architecture that incorporates 48 cores on a single...

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Bibliographic Details
Published in:Concurrency and computation 2012-08, Vol.24 (12), p.1317-1333
Main Authors: Marker, Bryan, Chan, Ernie, Poulson, Jack, van de Geijn, Robert,  Van der Wijngaart, Rob F., Mattson, Timothy G., Kubaska, Theodore E.
Format: Article
Language:English
Subjects:
collective communication
dense linear algebra library
many-core architecture
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Summary:SUMMARY A message passing, distributed‐memory parallel computer on a chip is one possible design for future, many‐core architectures. We discuss initial experiences with the Intel Single‐chip Cloud Computer research processor, which is a prototype architecture that incorporates 48 cores on a single die that can communicate via a small, shared, on‐die buffer. The experiment is to port a state‐of‐the‐art, distributed‐memory, dense matrix library, Elemental, to this architecture and gain insight from the experience. We show that programmability addressed by this library, especially the proper ion for collective communication, greatly aids the porting effort. This enables us to support a wide range of functionality with limited changes to the library code. Copyright © 2011 John Wiley & Sons, Ltd.
ISSN:1532-0626
1532-0634
DOI:10.1002/cpe.1832