A novel seven‐level inverter with high gain and reducing spike current capabilities

This paper describes a novel seven‐level (7L) inverter. The suggested topology offers a 7L output voltage and a threefold gain by using proper capacitor values. The suggested topology reduces the spike current induced by the capacitor by the use of a resonant inductor. The suggested inverter's...

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Bibliographic Details
Published in:International journal of circuit theory and applications 2024-07
Main Authors: Anand, Ravi, Mandal, Rajib Kumar, Choudhary, Ankita
Format: Article
Language:English
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Summary:This paper describes a novel seven‐level (7L) inverter. The suggested topology offers a 7L output voltage and a threefold gain by using proper capacitor values. The suggested topology reduces the spike current induced by the capacitor by the use of a resonant inductor. The suggested inverter's performance under various loads and situations is compared with those found in existing literature. The simulation findings confirm the system's strong performance in terms of component count, control circuit simplicity, and possible cost reductions, while retaining similar or enhanced performance metrics as compared with the aforementioned topologies. A laboratory setup is used to validate the feasibility of the suggested topology and provide solid evidence of its effectiveness. Furthermore, discussions about the possible uses of this structure in energy conversion are conducted.
ISSN:0098-9886
1097-007X
DOI:10.1002/cta.4200