Loading…
Single-ended frequency divider with moduli of 256-271
This paper demonstrates a low‐cost 2.4 GHz single‐ended frequency divider with the divide‐by‐value from 256 to 271 in the standard 0.35‐μm 2P4M CMOS technology. This frequency divider is composed of a synchronous current mode logic divide‐by‐4/5 prescaler, an asynchronous true single‐phase‐clock tog...
Saved in:
Published in: | Microwave and optical technology letters 2006-10, Vol.48 (10), p.2096-2100 |
---|---|
Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Summary: | This paper demonstrates a low‐cost 2.4 GHz single‐ended frequency divider with the divide‐by‐value from 256 to 271 in the standard 0.35‐μm 2P4M CMOS technology. This frequency divider is composed of a synchronous current mode logic divide‐by‐4/5 prescaler, an asynchronous true single‐phase‐clock toggle flip‐flops divide‐by‐64 divider, and a digital control circuitry. This proposed divider is single‐ended and compatible to the single‐ended low‐phase‐noise Colpitts VCO. The operating frequency range of the divider is from 400 to 2.9 GHz. Most of the input sensitivity levels are about −10 dBm and the lowest level is −25 dBm at 2.4 GHz. Its core power consumption is about 28 mW. The chip size is 1.2 × 0.7 mm2. © 2006 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 2096–2100, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21876 |
---|---|
ISSN: | 0895-2477 1098-2760 |
DOI: | 10.1002/mop.21876 |