Proposal for Stochastic Bit Stream Processing Using Optoelectronic Smart Pixels: A Neural Network Architectural Case Study

• Published in: Journal of parallel and distributed computing 1997-02, Vol.41 (1), p.92-108
• Main Authors: Hands, M.A., Peiffer, W., Thienpont, H., Kirk, A., Hall, T.J., Pignon, D., Parmiter, P.
• Format: Article
• Language: English
• ISSN: 0743-7315; 1096-0848
• DOI: 10.1006/jpdc.1996.1283

A neural network architecture which uses stochastic processing techniques to perform the weighted input multiplication, summation, and thresholding processes of a neuron using the optimal amount of hardware is described. It will be argued that the advantage of this approach is that it will allow large neural networks to be fabricated with relatively small amounts of hardware. The architecture allows a choice to be made between the speed and accuracy of processing, as well as a choice of hardware. Implementations of a bit stream neuron using electronic, optoelectronic and optical hardware are developed and their capabilities are compared based on speed of processing and network size. The aim of this study is to investigate the capabilities of optical logic in distributed processing systems and specifically the use of the optical thyristor as logic elements. It is shown that optical processing and optical interconnection allows a simplification of the processing sequence and allows the parallelism of distributed systems to be utilized. Experimental results of a detector matrix which can statistically quantify the occupancy ratio of optical ones and zeros in a spatial pattern and that can be considered to implement the sum, thresholding, and sigmoid translation functions of a neuron are given.