A 7-GHz multiloop ring oscillator in 0.18-μm CMOS technology

A novel delay stage for ring oscillator utilizing multiloop technique is presented in this paper. Different conventional delay stages for the multiloop ring oscillators have been reviewed and analyzed in this work. By using push-pull inverter as the secondary input in its delay cell, the proposed os...

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Published in:Analog integrated circuits and signal processing 2008-09, Vol.56 (3), p.179-184
Main Authors: Liu, Hai Qi, Siek, Liter, Goh, Wang Ling, Lim, Wei Meng
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Language:English
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Circuits and Systems
Electrical Engineering
Engineering
Signal,Image and Speech Processing
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description A novel delay stage for ring oscillator utilizing multiloop technique is presented in this paper. Different conventional delay stages for the multiloop ring oscillators have been reviewed and analyzed in this work. By using push-pull inverter as the secondary input in its delay cell, the proposed oscillator demonstrates a frequency improvement of up to 17% when compared with conventional designs. The fabricated oscillator is measured to cover a frequency range of 6.24–7.04 GHz. Operating in 1.8-V power supply, the oscillator manifests itself a phase noise of −107.7 dBc/Hz@10 MHz offset from a center frequency of 6.25 GHz. The proposed oscillator consumes a current of 40–51 mA from the 1.8-V supply and occupies an area of 440 μm ×  430 μm.
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Signal,Image and Speech Processing
title A 7-GHz multiloop ring oscillator in 0.18-μm CMOS technology
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