Superconducting electronics testing

An I/O assembly has been designed and constructed to support the operation of superconducting circuitry. The system, previously described 9 for chip testing, has been adapted for use with a Josephson technology system level experiment. The cryoinsert assembly, constructed of non-magnetic parts, prov...

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Bibliographic Details
Published in:Cryogenics (Guildford) 1983-01, Vol.23 (2), p.107-109
Main Authors: Moskowitz, P.A., Guernsey, R.W., Stasiak, J.W., Flint, E.B.
Format: Article
Language:English
Subjects:
chip
electronics
superconductor
testing assembly
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Description
Summary:An I/O assembly has been designed and constructed to support the operation of superconducting circuitry. The system, previously described 9 for chip testing, has been adapted for use with a Josephson technology system level experiment. The cryoinsert assembly, constructed of non-magnetic parts, provides 80 high frequency I/O lines between room temperature and 4.2 K.
ISSN:0011-2275
1879-2235
DOI:10.1016/0011-2275(83)90124-8