Design and use of DIP-1: A fast, flexible and dynamically microprogrammable pipelined image processor

The design of a fast, flexible and dynamically microprogrammable pipelined image processor is presented. The machine is especially suited, though not completely devoted, to perform local operations (up to 16 × 16) of both logical and arithmetic character on pictures, stored in a random access image...

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Bibliographic Details
Published in:Pattern recognition 1981, Vol.14 (1), p.319-330
Main Authors: Gerritsen, F.A., Aardema, L.G.
Format: Article
Language:English
Subjects:
Binary image operations
Debugging software
Image processing hardware
Microprogrammable image processor
Microprogramming support software
Neighbourhood operations
Pipelined image processor
Reconfigurable pipeline
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Summary:The design of a fast, flexible and dynamically microprogrammable pipelined image processor is presented. The machine is especially suited, though not completely devoted, to perform local operations (up to 16 × 16) of both logical and arithmetic character on pictures, stored in a random access image memory in a 256 level grey scale. Separate parts of the machine take care of data manipulation and address generation. The machine's functioning is illustrated by discussing the way in which arithmetic N × N neighbourhood operations and binary 3 × 3 neighbourhood operations were implemented and finally the software supporting microprogram development and debugging and the run-time support software is described.
ISSN:0031-3203
1873-5142
DOI:10.1016/0031-3203(81)90077-7