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A synthesis system for PLA-based programmable hardware

An automatic synthesis system for PLA based programmable hardware as part of a VLSI design system is presented. In order to reduce the needed silicon area of a PLA implementation we suggest algorithms for segmentation, term minimization and PLA — folding. We present results of the implemented term m...

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Bibliographic Details
Published in:Microprocessing and microprogramming 1983-01, Vol.12 (1), p.15-31
Main Author: Grass, Werner
Format: Article
Language:English
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Summary:An automatic synthesis system for PLA based programmable hardware as part of a VLSI design system is presented. In order to reduce the needed silicon area of a PLA implementation we suggest algorithms for segmentation, term minimization and PLA — folding. We present results of the implemented term minimization and PLA-folding procedures.
ISSN:0165-6074
DOI:10.1016/0165-6074(83)90112-6