Thermal management of microwave power heterojunction bipolar transistors

A comprehensive study of the device layout effects on thermal resistance in thermally-shunted heterojunction bipolar transistors (HBTs) was completed. The thermal resistance scales linearly with emitter dot diameter for single element HBTs. For multiple emitter element devices, the thermal resistanc...

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Bibliographic Details
Published in:Solid-state electronics 1997-10, Vol.41 (10), p.1667-1673
Main Authors: Bozada, C., Cerny, C., De Salvo, G., Dettmer, R., Ebel, J., Gillespie, J., Havasy, C., Jenkins, T., Ito, C., Nakano, K., Pettiford, C., Quach, T., Sewell, J., Via, G.D., Anholt, R.
Format: Article
Language:English
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Summary:A comprehensive study of the device layout effects on thermal resistance in thermally-shunted heterojunction bipolar transistors (HBTs) was completed. The thermal resistance scales linearly with emitter dot diameter for single element HBTs. For multiple emitter element devices, the thermal resistance scales with area. HBTs with dot geometrics have lower thermal impedance than bar HBTs with equivalent emitter area. The thermal resistance of a 200 μm 2 emitter area device was reduced from 266°C/W to 146°C/W by increasing the shunt thickness from 3 μm to 20 μm and placing a thermal shunt landing between the fingers. Also, power-added efficiencies at 10 GHz were improved from 30% to 68% by this thermal resistance reduction.
ISSN:0038-1101
1879-2405
DOI:10.1016/S0038-1101(97)00121-4