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Effects of low dimensions on junction parameters of MOS devices
The electrical properties of the drain–substrate diode of submicronic devices are shown to be related to the device geometrical structure. The analysis takes into account two-dimensional edge effects. Intrinsic parameters are extracted from current–voltage characteristics and obtained dependant on t...
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Published in: | Materials science & engineering. B, Solid-state materials for advanced technology Solid-state materials for advanced technology, 2000-05, Vol.74 (1), p.286-288 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | The electrical properties of the drain–substrate diode of submicronic devices are shown to be related to the device geometrical structure. The analysis takes into account two-dimensional edge effects. Intrinsic parameters are extracted from current–voltage characteristics and obtained dependant on the gate length and width. A degradation of the electrical properties is discussed and edge effects are related to small gate surface. |
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ISSN: | 0921-5107 1873-4944 |
DOI: | 10.1016/S0921-5107(99)00577-2 |