A SPICE-type nonlinear operational floating current conveyor macromodel

This paper address the derivation of a SPICE-type macromodel for imitating the nonlinear behavior of operational floating current conveyors (OFCC) at low-frequency. By using 0.35μm AMS CMOS technology with ±1.5V bias voltage the OFCC is designed and its most influential performance parameters are ac...

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Bibliographic Details
Published in:International journal of electronics and communications 2021-01, Vol.128, p.153509, Article 153509
Main Authors: Velázquez-Morales, C.A., Sánchez-López, C.
Format: Article
Language:English
Subjects:
Chaos
Current conveyors
Modeling
Nonlinear systems
Operational floating conveyor
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Summary:This paper address the derivation of a SPICE-type macromodel for imitating the nonlinear behavior of operational floating current conveyors (OFCC) at low-frequency. By using 0.35μm AMS CMOS technology with ±1.5V bias voltage the OFCC is designed and its most influential performance parameters are acquired, like the bandwidth, DC gain, dynamic range, slew-rate together with parasitic components connected to output-input ports. Afterwards, the behavioral model of the OFCC is derived and the SPICE-type macromodel is coded. A saturated nonlinear function series (SNFS) based on OFCC is designed for certifying the SPICE-type macromodel. To do it, chaotic waveforms were used as input signal to SNFS based on OFCC with CMOS transistors and to the deduced macromodel. Time-domain numerical simulations demonstrate that the deduced macromodel is able to predict the nonlinear behavior of analog circuits with little error and reducing the CPU-time in comparison with the macromodel at the transistor level.
ISSN:1434-8411
1618-0399
DOI:10.1016/j.aeue.2020.153509