Fully digital background calibration of channel mismatches in time-interleaved ADCs using recursive least square algorithm

• Published in: International journal of electronics and communications 2021-02, Vol.130, p.153574, Article 153574
• Main Authors: Hoang, Van-Phuc, Ta, Van-Thanh
• Format: Article
• Language: English
• Subjects: Channel mismatches; Fully digital background calibration; Recursive least square (RLS) algorithm; Time-interleaved analog-to-digital converter (TIADC)
• ISSN: 1434-8411; 1618-0399
• DOI: 10.1016/j.aeue.2020.153574

Time-interleaved analog-to-digital converters (TIADCs) have been considered as a very promising solution for high-speed direct sampling receivers. However, channel mismatches reduce the TIADC’s performance significantly. Therefore, calibration of these mismatches is emerging to maintain the performance of these TIADCs. This paper proposes a fully digital background calibration technique for multiple deviations including offset, gain, and timing mismatches. Offset and gain deviations in TIADCs are sequentially calibrated by taking the average value of the output samples, and calculating the ratios of power, respectively. Then, the timing mismatch is compensated by using the Hadamard matrix and the adaptive recursive least square (RLS) algorithm. The proposed calibration technique is proven through the simulation results for signal-to-noise-and-distortion (SNDR), spurious-free dynamic range (SFDR) and time convergence. As a result, the performance of TIADC is improved by 40.98 dB and 70.64 dB for SNDR and SFDR, respectively.