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A scalable method for fabricating monolithic perovskite/silicon tandem solar cells based on low-cost industrial silicon bottom cells

•Low-cost industrial silicon heterojunction solar cells were used for bottom cells.•Large-area perovskite surface passivation process was conducted based on a scalable slot-die coating method.•The small size TSC device (2.5 × 2.5 cm2, aperture area of 1 × 1 cm2) fabricated by slot-die coating exhibi...

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Bibliographic Details
Published in:Chemical engineering journal (Lausanne, Switzerland : 1996) Switzerland : 1996), 2024-09, Vol.495, p.153422, Article 153422
Main Authors: Qiang, Ziyue, Wu, Yao, Gao, Xiang, Gong, Yuanbo, Liu, Yuqi, Zhao, Xiaoxia, Tian, Hongbo, Wang, Wei, Wang, Caixia, Liu, Wei, Zong, Jun, Jiang, Jun
Format: Article
Language:English
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Summary:•Low-cost industrial silicon heterojunction solar cells were used for bottom cells.•Large-area perovskite surface passivation process was conducted based on a scalable slot-die coating method.•The small size TSC device (2.5 × 2.5 cm2, aperture area of 1 × 1 cm2) fabricated by slot-die coating exhibited efficiency of 28.68 %.•A champion efficiency of 24.22 % and open-circuit voltage of 1.915 V was obtained in 5 × 5 cm2 TSC device (aperture area of 3.8 × 3.8 cm2). Tandem solar cells composed of perovskite and silicon (PVSK/Si TSCs) exhibit significant potential for improving the power conversion efficiency (PCE) and reducing the levelized cost of electricity. Currently, most tandem cells demonstrating high efficiencies utilize costly float zone (FZ) silicon wafers, which pose limitations for large-scale production due to their high expense. This study presents a scalable approach for manufacturing perovskite/silicon tandem solar cells using industrial silicon bottom cells. We employ a double-layer intrinsic amorphous silicon passivation layer to enhance the carrier lifetime of the bottom silicon cell. Additionally, we introduce a novel indium oxide doped with transition metals (IMO) transparent electrode to enhance near-infrared (NIR) light absorption. To achieve silicon bottom cells with a polished front surface, we utilize a cost-effective and time-saving saw damage etching process. The perovskite absorber is then deposited on the polished surface using slot-die coating. Furthermore, we coat the perovskite absorber with a mixed solution of FAI and mF-PEAI via slot-die coating to eliminate excess PbI2 on the surface and passivate surface defects. Through the integration of top and bottom sub-cells, we obtained a PCE exceeding 24.22 % from a 5 cm × 5 cm TSCs device (with an aperture area of 3.8 cm × 3.8 cm) and a PCE of 28.68 % from a 2.5 cm × 2.5 cm TSCs device (with an aperture area of 1 cm × 1 cm).
ISSN:1385-8947
DOI:10.1016/j.cej.2024.153422