Loading…

Sensitivity analysis of a PLC-based DSSS anti-islanding system in power distribution grids

•An islanding can be detected by monitoring bit error rate, bit rate and latency.•System detects islanding within 33 ms, following IEEE Std. 929-2000 and 1547-2003.•The DSSS settings, providing the highest communication efficiency, were identified.•The bypass scheme improves efficiency and applicabi...

Full description

Saved in:
Bibliographic Details
Published in:International journal of electrical power & energy systems 2019-12, Vol.113, p.739-747
Main Authors: Poluektov, Anton, Pinomaa, Antti, Romanenko, Aleksei, Ahola, Jero, Kosonen, Antti
Format: Article
Language:English
Subjects:
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:•An islanding can be detected by monitoring bit error rate, bit rate and latency.•System detects islanding within 33 ms, following IEEE Std. 929-2000 and 1547-2003.•The DSSS settings, providing the highest communication efficiency, were identified.•The bypass scheme improves efficiency and applicability range of the concept. As smart grid applications, distributed generation, and microgrid technologies have become more widespread, new safety-related issues have arisen. Unintentional islanding is an example of a grid fault that may result in damage to electrical equipment and severe personal injuries. In this paper, an anti-islanding system employing power line communication (PLC) and direct-sequence spread spectrum (DSSS) modulation implemented with software-defined radios for continuous signaling is tested in a laboratory test setup. A concept of a fault detection algorithm is evaluated. A DSSS sensitivity analysis is carried out to investigate system’s performance against variation of a signal-to-noise ratio, and define optimal DSSS settings. The results of the analysis are interpreted, and conclusions are drawn. A transformer bypassing scheme allowing to increase the fault detection speed and throughput is introduced and tested, and the conditions of applicability are described. As a result of the study, recommendations for the system development are presented.
ISSN:0142-0615
1879-3517
DOI:10.1016/j.ijepes.2019.06.022