Design and analysis of 1xN symmetrical optical splitters for photonic integrated circuits

• Published in: Optik (Stuttgart) 2018-09, Vol.169, p.321-331
• Main Authors: T., Sridarshini, S., Indira Gandhi, M., Rakshitha
• Format: Article
• Language: English
• Subjects: Finite difference time domain; Optical power splitter; Passive optical networks; Photonic bandgap; Photonic integrated circuits; Plane wave expansion
• ISSN: 0030-4026; 1618-1336
• DOI: 10.1016/j.ijleo.2018.05.053

•Symmetrical 1xN splitter with ring resonators and waveguide for PON network has been designed.•The operating wavelength 1490 nm for downstreaming satisfies the ITU-T reccommendations.•Simulation and results were analysed using Plane wave expansion and Finite difference time domain methodologies.•The simulation has been carried out for entire Photonic bandgap range and optimization is done to obtain higher efficiency at 1490 nm.•Design complexity and footprint makes it suitable and a best candidate for PON and also for Photonic integrated circuits. Optical power splitters play a momentous role because of its capability to completely eliminate active devices in the Passive Optical Network (PON) link which progressively improves the broadband optical communication. Communication link between the service provider and the user premises of PON networks depends on the splitter. Even though various types of splitters based on optical fibre are available, we report the design and simulation results of 1 × 2, 1 × 4 and 1 × 8 symmetrical splitters based on photonic crystal ring resonators. Photonic crystal optical splitters will provide technological compatibility for integration in Photonic Integrated Circuits (PIC). The designed layout operates at 1490 nm wavelength, which is the recommended ITU-T standard for down streaming in PON architecture. Finite difference time domain (FDTD) method and Plane wave expansion (PWE) method is used for simulation. The upshot of this simulation exhibits good splitting of optical power in terms of its overall efficiency, splitting ratio and propagation delay. Its miniaturised size and capacity to integrate as PIC, the reported layout makes itself as a best and suitable candidate for PON architecture.