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Tuning resistive switching parameters in Si3N4-based RRAM for three-dimensional vertical resistive memory applications
In this work, new 3D vertical RRAM device with silicon CMOS compatibility and the possible fabrication process are presented. RRAM devices based on Ni/Si3N4/p+-Si stack which are applicable in our proposed 3D vertical RRAM structure were fabricated in order to reveal the effects of switching layer t...
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Published in: | Journal of alloys and compounds 2016-04, Vol.663, p.419-423 |
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Main Authors: | , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | In this work, new 3D vertical RRAM device with silicon CMOS compatibility and the possible fabrication process are presented. RRAM devices based on Ni/Si3N4/p+-Si stack which are applicable in our proposed 3D vertical RRAM structure were fabricated in order to reveal the effects of switching layer thickness and compliant current on resistive switching parameters. Forming-less behavior can be easily achieved by controlling thickness of the Si3N4 layer. It is found that the high- and low-resistance state can be effectively modulated by the film thickness and compliance current, respectively.
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•New 3D vertical RRAM structure with CMOS compatibility is proposed.•Forming-less behavior can be achieved by controlling film thickness.•HRS can be modulated by film thickness.•LRS can be tuned by compliance current. |
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ISSN: | 0925-8388 1873-4669 |
DOI: | 10.1016/j.jallcom.2015.10.142 |