Drain current modelling of planar TFETs

Tunnel Field Effect Transistors are one of the most promising ultra-low power steep slope device. Extremely low OFF current, sub-threshold swing which is less than Boltzmann's limit, higher immunity towards short channel effects and CMOS compatibility are the most important features of this tec...

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Bibliographic Details
Main Authors: U.S., Shikha, K. James, Rekha
Format: Conference Proceeding
Language:English
Subjects:
Ambipolarity
Band to band tunnelling
Drain current modelling
Pseudo 2D
Tangent line approximation
Tunnel field effect transistors
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Summary:Tunnel Field Effect Transistors are one of the most promising ultra-low power steep slope device. Extremely low OFF current, sub-threshold swing which is less than Boltzmann's limit, higher immunity towards short channel effects and CMOS compatibility are the most important features of this technology. Works related to the drain current modelling of various planar TFETs are presented in this paper. Different approaches and assumptions adopted to solve the surface potential to derive the drain current is reviewed here.
ISSN:2214-7853
2214-7853
DOI:10.1016/j.matpr.2020.09.098