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A three-stage OTA with hybrid active miller enhanced compensation technique for large to heavy load applications

A three-stage amplifier with hybrid active Miller enhancement compensation is proposed in this paper, which is used for large to heavy load applications. The hybrid active Miller enhancement compensation (HAMEC) is composed of an amplified cascode Miller capacitor block and a local active compensati...

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Published in:Microelectronics 2021-09, Vol.115, p.105199, Article 105199
Main Authors: Dong, Siwan, Liu, Cong, Xin, Xin, Tong, Xingyuan
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Language:English
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Liu, Cong
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Tong, Xingyuan
description A three-stage amplifier with hybrid active Miller enhancement compensation is proposed in this paper, which is used for large to heavy load applications. The hybrid active Miller enhancement compensation (HAMEC) is composed of an amplified cascode Miller capacitor block and a local active compensation network. The sub-threshold transconductance enhanced compensation (STEC) amplifying block consists of a sub-threshold amplifier and a cascode capacitor, which effectively broadens the complex-poles frequency and improves the loop stability. A novel slew rate enhancement structure is also proposed to improve the transient response under large signal conditions. The amplifier has been verified in a 0.18 μm CMOS process. After simulation verification, the capacitive loads of 0.5pF-20nF can be driven, meanwhile, a gain bandwidth of 2.98–9.76 MHz can be achieved. It only consumes 41.28 μW power when driving a 20 nF capacitor load under 1.2 V power supply, and compensation capacitor size is only 475 fF. Finally, the figure of merits (FoM) value is effectively improved compared with recent work.
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The hybrid active Miller enhancement compensation (HAMEC) is composed of an amplified cascode Miller capacitor block and a local active compensation network. The sub-threshold transconductance enhanced compensation (STEC) amplifying block consists of a sub-threshold amplifier and a cascode capacitor, which effectively broadens the complex-poles frequency and improves the loop stability. A novel slew rate enhancement structure is also proposed to improve the transient response under large signal conditions. The amplifier has been verified in a 0.18 μm CMOS process. After simulation verification, the capacitive loads of 0.5pF-20nF can be driven, meanwhile, a gain bandwidth of 2.98–9.76 MHz can be achieved. It only consumes 41.28 μW power when driving a 20 nF capacitor load under 1.2 V power supply, and compensation capacitor size is only 475 fF. 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subjects Frequency compensation
Heavy load application
PVT Stabilization
Three-stage amplifier
title A three-stage OTA with hybrid active miller enhanced compensation technique for large to heavy load applications
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