Impacts of quantum confinement effect on threshold voltage and drain-induced barrier lowering effect of junctionless surrounding-gate nanosheet NMOSFET including source/drain depletion regions

• Published in: Microelectronics 2024-10, Vol.152, p.106392, Article 106392
• Main Authors: Xu, Lijun, An, Linfang, Zhao, Jia, He, Yulei, Teng, Lijuan, Jiang, Yuanxing
• Format: Article
• Language: English
• Subjects: Drain-induced barrier lowering; Junctionless surrounding-gate nanosheet NMOSFET; Quantum confinement effect; Source/drain depletion regions; Threshold voltage
• ISSN: 1879-2391
• DOI: 10.1016/j.mejo.2024.106392

In order to modeling of junctionless (JL) surrounding-gate (SG) nanosheet MOSFET more accurately, a new model for determining threshold voltage and drain-induced barrier lowering (DIBL) effect of JL SG nanosheet NMOSFET is proposed through deriving the Poisson's equation under rectangular coordinate system. The model captures quantum confinement effect and source/drain depletion regions, it is validated through the Sentaurus TCAD simulation results. Variations of source/drain depletion regions with the channel width, height, doping concentration, the gate bias, the drain bias and variations of threshold voltage, DIBL with the channel width, height, doping concentration considering and not considering quantum confinement effect are studied, respectively. The results show influences of quantum confinement effect on source/drain depletion regions, threshold voltage and DIBL. The developed model will offer quantum corrections in JL SG nanosheet NMOSFET.