Total ionizing dose effects on nanosheet and nanowire field effect transistors

Total ionizing dose (TID) effects are investigated in a nanosheet gate-all-around field effect transistor using three-dimensional technology computer aided design simulation. TID is a reliability concern in terms of building up trap charges in any dielectric surrounding the transistor body. In this...

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Bibliographic Details
Published in:Microelectronics and reliability 2021-06, Vol.121, p.114145, Article 114145
Main Authors: Han, Jin-Woo, Kim, Jungsik, Meyyappan, M.
Format: Article
Language:English
Subjects:
Bulk oxide trap
Gate-all-around
Interface trap
Nanosheet
Nanowire
Total ionizing dose (TID)
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Summary:Total ionizing dose (TID) effects are investigated in a nanosheet gate-all-around field effect transistor using three-dimensional technology computer aided design simulation. TID is a reliability concern in terms of building up trap charges in any dielectric surrounding the transistor body. In this work, the impact of trap charges on different dielectrics including gate oxide, gate spacer and shallow trench isolation is discussed. The TID vulnerabilities for various channel characteristics are compared. Methods for suppressing the manifestation of trap charges are suggested. •Total ionizing dose (TID) effects are investigated in a nanosheet gate all around transistor.•TID effect is evaluated using TCAD simulator.•Impact of charges in gate spacer and shallow trench isolations is studied.•TID at the gate spacer makes device vulnerable for the junction underlap structure.•TID at the shallow trench isolation makes device vulnerable as the nanosheet width becomes narrow.
ISSN:0026-2714
1872-941X
DOI:10.1016/j.microrel.2021.114145