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Development and testing of a radiation-hard large-electrode DMAPS design in a 150 nm CMOS process

The LF-Monopix chips are depleted monolithic active pixel sensors that follow the large-electrode design approach and implement a fast synchronous read-out architecture. They are designed in a 150 nm CMOS process and make use of large voltages (>250V) and highly resistive substrates (>2kΩ⋅cm)...

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Published in:Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment Accelerators, spectrometers, detectors and associated equipment, 2022-10, Vol.1040, p.167224, Article 167224
Main Authors: Caicedo, I., Barbero, M., Barrillon, P., Bespin, C., Breugnon, P., Chabrillat, P., Degerli, Y., Dingfelder, J., Guilloux, F., Habib, A., Hemperek, T., Hirono, T., Hügging, F., Krüger, H., Pangaud, P., Rozanov, A., Rymaszewski, P., Schall, L., Schwemling, P., Vogt, M., Wang, T., Wermes, N.
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Language:English
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Summary:The LF-Monopix chips are depleted monolithic active pixel sensors that follow the large-electrode design approach and implement a fast synchronous read-out architecture. They are designed in a 150 nm CMOS process and make use of large voltages (>250V) and highly resistive substrates (>2kΩ⋅cm) to collect charge through drift and enhance their radiation hardness. Samples of the first prototype (“LF-Monopix1”) with a thickness of 100μm were irradiated to assess the tolerance of the chip’s substrate and front-end circuitry to the surface and bulk damage doses expected at modern collider experiments. The device remained fully operational, with only a very small gain degradation and an increase in noise by less than 25% after a total ionizing dose of 100Mrad. Efficiency measurements in a sample exposed to a neutron fluence of 1×1015neq/cm2 showed that at least 96% of all minimum ionizing particles going through a fully depleted detector are recorded in less than 25ns. In the latest design (“LF-Monopix2”) the column length was tripled and the pixel pitch reduced by 40% with respect to its predecessor. The chip was successfully thinned down while keeping its breakdown voltage above 400V and achieving a front-end threshold dispersion of ∼100e− after tuning.
ISSN:0168-9002
1872-9576
DOI:10.1016/j.nima.2022.167224