Improving the performance of high-efficiency silicon heterojunction solar cells through low-temperature deposition of an i-a-Si:H anti-epitaxial buffer layer

• Published in: Solar energy materials and solar cells 2024-08, Vol.273, p.112952, Article 112952
• Main Authors: Peng, Chen-Wei, He, Chenran, Wu, Hongfan, Huang, Si, Yu, Cao, Su, Xiaodong, Zou, Shuai
• Format: Article
• Language: English
• Subjects: Amorphous silicon; Anti-epitaxial layer; Low-temperature procedure; Silicon heterojunction solar cells; Surface passivation
• ISSN: 0927-0248
• DOI: 10.1016/j.solmat.2024.112952

In this work, an effective strategy for realizing high-performance silicon heterojunction (SHJ) solar cells involves replacing the existing rear single intrinsic hydrogenated amorphous silicon (i-a-Si:H) layer by depositing a bi-layer i-a-Si:H stack on the rear side using two different deposition chambers and manipulating the deposition temperature to inhibit epitaxial growth at the interface and maintain a good interfacial passivation effect. A low-temperature procedure is implemented to deposit the first anti-epitaxial i-a-Si:H buffer layer (I1 layer) of ∼1.5 nm thickness with a high hydrogen concentration and a low refractive index prior to the second bulk i-a-Si:H layer (I2 layer) of ∼5.5 nm thickness. The effects of the growth temperature and ignition power during deposition on the optical and structural properties of the i-a-Si:H buffer layers are investigated, and the impact of the buffer layers on carrier transport and collection is also evaluated. Utilizing this strategy, a trade-off between guaranteed passivation capability and low contact resistivity results in an improvement of 0.21%abs in power conversion efficiency (PCE), which is mainly driven by increases in Voc and FF, and a certified PCE of 25.92 %, with a high open circuit voltage (Voc) of 749.7 mV, is achieved on a full-area M6-size industry-grade silicon wafer. •A novel bi-layer i-a-Si:H process was developed for SHJ solar cells.•This work proposes a low-temperature procedure to deposit an anti-epitaxial i-a-Si:H buffer layer.•The anti-epitaxial i-a-Si:H buffer layer deposited at 140 °C achieves a high minority carrier lifetime exceeding 3000 μs.•The trade-off between surface passivation and contact resistance enhances the performance of SHJ solar cells.•A certified efficiency of 25.92 % for a M6-size SHJ solar cell was achieved by employing the bi-layer i-a-Si:H process.