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High-performance logic transistor DC benchmarking toward 7 nm technology-node between III–V and Si tri-gate n-MOSFETs using virtual-source injection velocity model
•We performed the virtual-source based analytical modeling for advanced InGaAs and Si tri-gate n-MOSFETs.•We carried out the performance benchmarking for Si and InGaAs tri-gate n-MOSFETs at 7nm technology-node.•The 7nm technology-node would require a significant improvement in the virtual source inj...
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Published in: | Solid-state electronics 2016-02, Vol.116, p.100-103 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | •We performed the virtual-source based analytical modeling for advanced InGaAs and Si tri-gate n-MOSFETs.•We carried out the performance benchmarking for Si and InGaAs tri-gate n-MOSFETs at 7nm technology-node.•The 7nm technology-node would require a significant improvement in the virtual source injection velocity and the electrostatic integrity.
Injection velocity (vinj) is a unique figure-of-merit that determines logic transistor ON-current (ION) and switching delay (CV/I). This paper reports on Virtual-Source (VS) based analytical and physical model, which was calibrated by using state-of-the-art experimental data on III–V and Si tri-gate n-MOSFET, aiming to compare High-Performance (HP) logic transistor performance at 7nm technology-node. We find that a significant increase in the virtual source injection velocity and improvement in the electrostatic integrity are critical, to meet the projected ION/IOFF ratio for the 7nm technology node. |
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ISSN: | 0038-1101 1879-2405 |
DOI: | 10.1016/j.sse.2015.11.031 |