Evaluation of an InAs HEMT with source-connected field plate for high-speed and low-power logic applications

• Published in: Solid-state electronics 2019-07, Vol.157, p.55-60
• Main Authors: Yao, Jing Neng, Lin, Yueh Chin, Lin, Min Song, Huang, Ting Jui, Hsu, Heng Tung, Sze, Simon M., Chang, Edward Y.
• Format: Article
• Language: English
• Subjects: Field plate; HEMT; InAs; Low power
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/j.sse.2019.03.060

•We have edited the highlights as below and attached.•InAs HEMTs electrical performance improvement by SCFP.•SS of 76 mV/dec, DIBL of 44 mV/V, and Ion/Ioff of 2.4 × 104 were achieved.•A high off-state breakdown voltage was achieved.•fT and fMAX of 113 GHz were demonstrated. In this study, we have presented a source-connected field plate (SCFP) InAs high electron mobility transistor (HEMT) and evaluated its potential for using in high-speed and low-power logic applications. The fabricated device demonstrated good electrical characteristics including low subthreshold swing (SS) of 76 mV/decade, drain induced barrier lowering (DIBL) of 44 mV/V, ION/IOFF ratio of 2.4 × 104, an off-state gate leakage current of less than 5 × 10−6 A/mm and a Gm,max of 1100 mS/mm at VDS = 0.5 V. When increasing the drain-source bias (VDS) to 1.0 V, the Gm,max increased to 1750 mS/mm with a cut-off frequency of 113 GHz. These results revealed that the fabrication of source-connected field plate InAs HEMTs achieved excellent device performance for high-speed and low-power logic applications.