Fast modulo 2 n + 1 multi-operand adders and residue generators

In this manuscript novel architectures for modulo 2 n + 1 multi-operand addition and residue generation are introduced. The proposed arithmetic components consist of a translation stage, an inverted end-around-carry carry-save-adder tree and an enhanced diminished-1 modulo 2 n + 1 adder. Qualitative...

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Bibliographic Details
Published in:Integration (Amsterdam) 2010, Vol.43 (1), p.42-48
Main Authors: Vergos, H.T., Bakalis, D., Efstathiou, C.
Format: Article
Language:English
Subjects:
Carry-save addition
Diminished-1 adder
Modulo [formula omitted] addition
Multi-operand addition
Residue arithmetic
Residue generation
Residue number system
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Summary:In this manuscript novel architectures for modulo 2 n + 1 multi-operand addition and residue generation are introduced. The proposed arithmetic components consist of a translation stage, an inverted end-around-carry carry-save-adder tree and an enhanced diminished-1 modulo 2 n + 1 adder. Qualitative and quantitative results indicate that the proposed architectures result in significantly faster and in several cases smaller circuits than the previously proposed.
ISSN:0167-9260
1872-7522
DOI:10.1016/j.vlsi.2009.04.002