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Optimal design for a high performance H-JLTFET using HfO 2 as a gate dielectric for ultra low power applications
In this paper we have proposed an optimal design for a hetero-junctionless tunnel field effect transistor (TFET) using HfO 2 as a gate dielectric. The device principle and performance are investigated using a 2D simulator. During this work, we investigated the transfer characteristics, output charac...
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| Published in: | RSC advances 2014, Vol.4 (43), p.22803-22807 |
|---|---|
| Main Authors: | , , , |
| Format: | Article |
| Language: | English |
| Citations: | Items that this one cites Items that cite this one |
| Online Access: | Get full text |
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| Summary: | In this paper we have proposed an optimal design for a hetero-junctionless tunnel field effect transistor (TFET) using HfO
2
as a gate dielectric. The device principle and performance are investigated using a 2D simulator. During this work, we investigated the transfer characteristics, output characteristics, transconductance,
G
m
, output conductance,
G
D
, and
C
–
V
characteristics of our proposed device. Numerical simulations resulted in outstanding performance of the H-JLTFET resulting in
I
ON
of ∼0.23 mA μm
−1
,
I
OFF
of ∼2.2 × 10
−17
A μm
−1
,
I
ON
/
I
OFF
of ∼10
13
, sub-threshold slope (SS) of ∼12 mV dec
−1
, DIBL of ∼93 mV V
−1
and
V
th
of ≃0.11 V at room temperature and
V
DD
of 0.7 V. This indicates that the H-JLTFET can play an important role in the further development of low power switching applications. |
|---|---|
| ISSN: | 2046-2069 2046-2069 |
| DOI: | 10.1039/C4RA00538D |