Multi-layer on-chip inductor for 10–100 GHz frequency applications

• Published in: Electronics letters 2015-02, Vol.51 (3), p.270-272
• Main Authors: Deevi, B.V.N.S.M. Nagesh, Rao, N. Bheema
• Format: Article
• Language: English
• Subjects: 3D inductor; Constants; Cross sections; frequency 10 GHz to 100 GHz; IE3D EM field solver; Inductance; Inductors; integrated circuit design; lambda rules; microwave integrated circuits; millimetre wave integrated circuits; moderate q‐factor value; multilayer on‐chip inductor; Multilayers; Organic and inorganic circuits and devices; planar inductor; quality factor; Q‐factor; radiofrequency technology; RC circuits; RF technology; series RL lumped Pi model; shunt RC lumped Pi model; size 180 nm; Solvers; Systems design; Three dimensional; three‐dimensional inductor; very large‐scale integration system; VLSI; VLSI system
• ISSN: 0013-5194; 1350-911X; 1350-911X
• DOI: 10.1049/el.2014.3202

A multi-layer inductor is proposed to achieve high inductance with moderate Q-factor values. The development of integration of devices technology in radio-frequency (RF) has increased the importance of on-chip inductors. In the literature, the planar inductor, the three-dimensional (3D) inductor with constant width and the 3D inductor with variable width are reported. Using the basic concept of multi-layer technology in very large-scale integration (VLSI) system design and considering lambda rules, the proposed inductor is designed. The inductance of the proposed inductor is nearly 37–45% higher compared with reported inductors with a moderate quality factor. This inductor is realised using 180 nm scale technology with an area of cross-section 10 × 10 µm2. Results are presented using the IE3D EM field solver with the help of series RL and shunt RC lumped Pi model.