Oligatomic Film Memories

• Published in: Journal of applied physics 1971-01, Vol.42 (4), p.1364-1373
• Main Authors: Benrud, V. M., Forslund, G. L., Hanson, M. M., Horst, R. L., Kaske, A. D., Kolling, J. A., Lo, D. S., Nordstrom, M. J., Oredson, H. N., Simon, W. J., Tolman, C. H., Torok, E. J.
• Format: Article
• Language: English
• ISSN: 0021-8979; 1089-7550
• DOI: 10.1063/1.1660254

For years the desideratum of flat-film fabricators has been a simply constructed high-density random-access NDRO bit organized memory with word and digit current levels low enough for high-density integrated electronics. This paper describes a new direction in flat-film memories that achieves that goal and a projected cost/bit an order-of-magnitude less than that of integrated circuit wire or core memories. Permalloy films only 100-Å thick, continuous in at least one direction to avoid registration problems, are deposited on glass or metal substrates; overlays having densities up to 40 000 bits/in.2 requiring word and digit currents as low as 25-mA peak are attached. The low-signal problem is solved by using rf alternating current in the word-line overlay and a sense amplifier tuned to double the word-current frequency. Switching is by magnetization creep, which allows bit organization and sharing of sense amplifiers similar to that of plated wire. Functional performance, uniformity, and reproducibility of four types of array geometries (10 000–30 000 bits/in.2) are described. Electron micrographs of domains in a 100-Å NiFe mirror being written, disturbed, and erased with 2-mil word and digit lines are shown. Also described are: a word driver and selection system which provides a constant word current of 35-mA rms at 35 MHz applicable to an array of 4096 word lines, and a sense gating system capable of sensing a 20-μ volt-induced sense signal at a frequency of 70 MHz with a 5:1 ``1'' to ``0'' ratio before discrimination; the sense amplifier has a 12-MHz bandwidth which allows 50-nsec changes in sense signal to be followed, but rejects word and digit noise. The access and cycle times of a prototype module under construction are 2 μsec.