Impact of free-surface passivation on silicon on insulator buried interface properties by pseudotransistor characterization

• Published in: Journal of applied physics 2007-06, Vol.101 (11), p.114513-114513-6
• Main Authors: Hamaide, G., Allibert, F., Hovel, H., Cristoloveanu, S.
• Format: Article
• Language: English
• ISSN: 0021-8979; 1089-7550
• DOI: 10.1063/1.2745398

It has been reported previously [ N. Bresson , Proceedings of the ECS Seventh International Symposium on Silicon-on-Insulator Technology and Devices , 2005 (unpublished), pp. 317-324 ; F Allibert , Proceedings of the IEEE International SOI Conference , Honolulu , HI , 2002 (unpublished) ] that the film thickness strongly impacts the parameters extracted using the pseudo metal oxide semiconductor field effect transistor (pseudo-MOSFET) with the usual FET equations [ S. Cristoloveanu and S. S. Li , Electrical Characterization of SOI Materials and Devices ( Kluwer , Boston, MA , 1995 ) ]. In this paper, we investigate the influence of top free-surface states on the pseudo-MOSFET characteristics by comparing passivated versus nonpassivated samples. The parameters of concern, investigated here, are carrier mobility, density of interface states, threshold ( V T ) , and flatband ( V FB ) voltages. Based on systematic measurements and existing models [ H. J. Hovel , Solid-State Electron. 47 , 1311 ( 2003 ) ] for V T , V FB , and subthreshold slope, we show how the free-surface impact increases as the film thickness is reduced. Comparison of extracted results with simulated curves demonstrates that, in state-of-the-art ultrathin silicon on insulator structures, the preparation and properties of the free surface are no longer negligible.