Electrical characterization of CeO2∕Si interface properties of metal-oxide-semiconductor field-effect transistors with CeO2 gate dielectric

Metal-oxide-semiconductor field-effect transistors with CeO2 gate dielectrics were fabricated. The lowest interface trap density (Dit) of CeO2∕Si interface in comparison with other high-κ gated diodes is 1.47×1012cm−2eV−1 due to the very low lattice mismatch of CeO2∕Si. The interfacial properties we...

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Bibliographic Details
Published in:Applied physics letters 2008-01, Vol.92 (4)
Main Authors: Chen, Chun-Heng, Chang, Ingram Yin-Ku, Lee, Joseph Ya-Min, Chiu, Fu-Chien
Format: Article
Language:English
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Summary:Metal-oxide-semiconductor field-effect transistors with CeO2 gate dielectrics were fabricated. The lowest interface trap density (Dit) of CeO2∕Si interface in comparison with other high-κ gated diodes is 1.47×1012cm−2eV−1 due to the very low lattice mismatch of CeO2∕Si. The interfacial properties were characterized by gated-diode measurements. The surface recombination velocity (s0) and the minority carrier lifetime in the field-induced depletion region (τ0,FIJ) measured from the gated diodes are about 1.03×104cm∕s and 2.73×10−8s, respectively. The effective capture cross section of surface state (σs) extracted using the gated diode technique and the subthreshold swing measurement is about 8.68×10−15cm2.
ISSN:0003-6951
1077-3118
DOI:10.1063/1.2838746