290KBit, 15μm cell bubble chip

A block replicate bubble memory chip with a 14×16μm2 bit cell size has been developed using state-of-the art bubble technology. Organized into 282 minor loops and 1025 bits per minor loop, the total capacity of the chip is 289,050 bits. At 25°C and 45 Oe drive the start-stop operating bias margin is...

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Bibliographic Details
Published in:Journal of applied physics 1979-01, Vol.50 (B3), p.2216-2218
Main Authors: Gergis, I. S., Tocci, L. R., Williams, J. L., Lee, W. P.
Format: Article
Language:English
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Summary:A block replicate bubble memory chip with a 14×16μm2 bit cell size has been developed using state-of-the art bubble technology. Organized into 282 minor loops and 1025 bits per minor loop, the total capacity of the chip is 289,050 bits. At 25°C and 45 Oe drive the start-stop operating bias margin is 18 Oe up to at least 300 kHz field rate. For operation over the temperature range −25°C to 100°C and up to 300 kHz, all chip drive parameters have at least ±10 percent operating range indicating that no drive parameter is required to be temperature compensated.
ISSN:0021-8979
1089-7550
DOI:10.1063/1.327059