Reverse Engineering of Integrated Circuits using Cross-Sectional Transmission Electron Microscopy-A Morphological and Structural Study

• Published in: Technical review - IETE 1998-01, Vol.15 (1-2), p.37-44
• Main Authors: Bharadwaj, L M, Gantcheva, V, Simov, S, Balossier, G, Faure, J, Bonhomme, P, Kumar, Parshant, Bajpai, R P
• Format: Article
• Language: English
• ISSN: 0256-4602; 0974-5971
• DOI: 10.1080/02564602.1998.11416726

Results are presented on reverse engineering of the integrated circuits (N-MOS device) using transmission electron microscopy (TEM). A modified technique has been described for preparation of cross-sectional transmission electron microscopy (XTEM) specimen from integrated circuits where the area of interest is confined to only few μm 2 . The modified technique has been successfully used for morphological and structural study of a N-MOS device. The different parameters studied are channel length, thickness, curvature and structure of various layers e.g., gate oxide, poly silicon, PSG, LOCOS, polyoxide, Al, Si 3 , N 4 etc. High Resolution Electron Microscopy (HREM) has been used to study the interface between Si-substrate and the gate oxide. Results are also presented on cross-sectional scanning electron microscopy (XSEM) of above device for discussing the merits and demerits of TEM and SEM for reverse engineering of integrated circuits to understand fundamental and technological problems associated with device technology.