Effect of Dead Layer on the Efficiency of Planar Semiconductor Neutron Detectors

Monte Carlo simulations have been performed to optimize design parameters such as dead layer, converter material thickness, and setting of lower level discrimination (LLD) in planar semiconductor neutron detectors. Efficiency calculations are carried out based on the Shultis--McGregor methodology. I...

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Bibliographic Details
Published in:Technical review - IETE 2016-01, Vol.33 (1), p.45-49
Main Authors: Gandhiraj, Prasanna, Parida, Manoj Kumar, Prabakar, Krishnamurthy, Manchi, Raghuramaiah, Sundari, Sankaran Tripura, Jayapandian, Jayaseelan, Sundar, Chakram Sampathkumar
Format: Article
Language:English
Subjects:
Dead layer
Monte Carlo simulations
Semiconductor neutron detector efficiency
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Summary:Monte Carlo simulations have been performed to optimize design parameters such as dead layer, converter material thickness, and setting of lower level discrimination (LLD) in planar semiconductor neutron detectors. Efficiency calculations are carried out based on the Shultis--McGregor methodology. It is found that the efficiency is maximum (∼4%) when 10 B/ 6 LiF thickness is ∼2.5/28 μm for an LLD of 300 keV. It is also found that introduction of a dead layer between the diode and converter material decreases the efficiency to ∼3%.
ISSN:0256-4602
0974-5971
DOI:10.1080/02564602.2015.1043151