Impact of device engineering on analog/RF performances of tunnel field effect transistors

• Published in: Semiconductor science and technology 2017-06, Vol.32 (6), p.65005
• Main Authors: Vijayvargiya, V, Reniwal, B S, Singh, P, Vishvakarma, S K
• Format: Article
• Language: English
• Subjects: cut-off frequency (FT); hetero gate dielectric based DG-TFET (HGDG-TFET); maximum oscillation frequency (Fmax); transconductance generation factor (TGF); Tunnel field effect transistor
• ISSN: 0268-1242; 1361-6641
• DOI: 10.1088/1361-6641/aa66bd

The tunnel field effect transistor (TFET) and its analog/RF performance is being aggressively studied at device architecture level for low power SoC design. Therefore, in this paper we have investigated the influence of the gate-drain underlap (UL) and different dielectric materials for the spacer and gate oxide on DG-TFET (double gate TFET) and its analog/RF performance for low power applications. Here, it is found that the drive current behavior in DG-TFET with a UL feature while implementing dielectric material for the spacer is different in comparison to that of DG-FET. Further, hetero gate dielectric-based DG-TFET (HGDG-TFET) is more resistive against drain-induced barrier lowering (DIBL) as compared to DG-TFET with high-k (HK) gate dielectric. Along with that, as compared to DG-FET, this paper also analyses the attributes of UL and dielectric material on analog/RF performance of DG-TFET in terms of transconductance (gm), transconductance generation factor (TGF), capacitance, intrinsic resistance (Rdcr), cut-off frequency (FT), and maximum oscillation frequency (Fmax). The LK spacer-based HGDG-TFET with a gate-drain UL has the potential to improve the RF performance of device.